This is a design circuit for FM mixer circuit with low voltage. This circuit is based on SA58640 single chip IC from Phillips semiconductor. This circuit can produce 45 MHz frequency for mixing the FM signal. This is the figure of the circuit;
For testing this circuit, we can use and follow the setting tester. The C-message and de-emphasis filter combination has a peak gain of 10 for accurate measurements. Without the gain, the measurements may be affected by the noise of the scope and HP339A analyzer. The de-emphasis filter has a fixed -6 dB/Octave slope between 300 Hz and 3 kHz. The ceramic filters can be 30 kHz SFG455A3s made by Murata which have 30 kHz IF bandwidth (they come in blue), or 16 kHz CFU455Ds, also made by Murata (they come in black). All specifications and testing are done with the wideband filter. Set your RF generator at 45.000 MHz, use a 1 kHz modulation frequency and a 6 kHz deviation if you use 16 kHz filters, or 8 kHz if you use 30 kHz filters. The measured typical sensitivity for 12 dB SINAD should be 0.45 mV or -114 dBm at the RF input. The smallest RSSI voltage (i.e., when no RF input is present and the input is terminated) is a measure of the quality of the layout and design. If the lowest RSSI voltage is 500 mV or higher, it means the receiver is in regenerative mode.
In that case, the receiver sensitivity will be worse than expected. All of the inductors, the quad tank, and their shield must be grounded. A 10 mF to 15 mF or higher value tantalum capacitor on the supply line is essential. A low frequency ESR screening test on this capacitor will ensure consistent good sensitivity in production. A 0.1 mF bypass capacitor on the supply pin VCC, and grounded near the 44.545 MHz oscillator improves sensitivity by 2 dB to 3 dB. R5 can be used to bias the oscillator transistor at a higher current for operation above 45 MHz. Recommended value is 22 kW, but should not be below 10 kW.
[Schematic project circuit source: Phillips Semiconductor Notes]
0 comments:
Post a Comment